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EE 231 Digital Electronics

Syllabus

Homework (Fundamentals of Digital Logic with Verilog Design)

Homework #1: B.1, B.4, B.6, B.8, B.13, B.44, B.47, B.50 (Due 8/28 in Office or 8/29 class time)

Homework #2: 2.10, 2.16, 2.21, 2.31, 2.36 (Due 9/10)

Homework #3: 2.51, 2.57, 2.60, 2.67, 2.71 (Due 9/17)

Homework #4: 3.5, 3.10, 3.18, 3.19, 3.25 (Due 9/26)

Homework #5: 4.6, 4.11, 4.18, 4.22, 4.28 (Due 10/8)

Homework #6: 5.3, 5.10, 5.16, 5.23, 5.26 (Due 10/22)