EE 231
Lab 3: Basic Combinational Circuits using a Programmable Logic Device
Prelab 3
Your assignment this week is to use a programmable logic device (PLD) to
implement a fairly complicated combinational system. The system will be a
four-input, three-output circuit which will add two (unsigned) two-bit binary
numbers. A truth table is started for you in Figure 1. You will implement
this logic with an Altera EPM7064LC44-15. This is a 44 pin PLD that we will
use in many of our labs. It can be programmed and erased many times and costs
about $5. The MAX+plus II software will be used to program and test it.
B10 |
A10 |
S210 |
|
B10 |
A10 |
S210 |
00 |
00 |
000 |
01 |
00 |
001 |
00 |
01 |
001 |
01 |
01 |
010 |
00 |
10 |
|
01 |
10 |
|
00 |
11 |
|
01 |
11 |
|
10 |
00 |
|
11 |
00 |
|
10 |
01 |
|
11 |
01 |
|
10 |
10 |
|
11 |
10 |
|
10 |
11 |
101 |
11 |
11 |
110 |
Figure 1: Truth table to add two (unsigned) two-bit binary numbers.
A sample AHDL (Altera Hardware Description Language) program, Figure 3,
implements the majority circuit from last week's lab . The truth table is
shown in Figure 2. The canonical sum of products (SOP) expression for the
majority circuit is M = ABC' + AB'C + A'BC + ABC. Note that
we did not reduce the equation. The Max+plus II software does this
automatically.
C |
B |
A |
M |
0 |
0 |
0 |
0 |
0 |
0 |
1 |
0 |
0 |
1 |
0 |
0 |
0 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
1 |
0 |
1 |
1 |
1 |
1 |
0 |
1 |
1 |
1 |
1 |
1 |
Figure 2: Truth table for a three bit majority circuit.
SUBDESIGN lab3sam
% Design to implement a three-input majority circuit %
(
A,B,C :INPUT; % Input Variables %
M :OUTPUT; % Output Variables %
)
% Define the logical equations of the circuit %
BEGIN
M=(!A & B & C) #
( A & !B & C) #
( A & B & !C) #
( A & B & C);
END;
Figure 3: AHDL program for a three input majority circuit.
The following will help you program your Altera logic array chip. There is
alot of on-line help. There are many ways to do each part; the information
below is one way that should get you going. See what you can discover and
what others in the class have found. Copy
N:\EE231\lab3\LAB3SAM.TDF and
LAB3SAM.SCF to your lab 3 subdirectory
on U:\EE231\lab3\.
-
Double click on the MAX+plus II icon to bring up the MAX+plus II program.
-
From the File menu choose project and choose name. Change
to your U:\EE231\lab3 subdirectory. Enter lab3sam to select
the sample files.
-
From the File menu choose open, select Text Editor files
then lab3sam.tdf and OK to open a text editor window. The
sample program should appear in the text editor window. Choose File,
Project, Save and Check. After it saves with no errors, choose
Assign Device from the Assign menu. Make sure Device
Family is set to Max7000 and that Show Only Fastest Speed
Grade is not checked. Select the exact name written on
your chip from the list of chips given ( e.g., EPM7064LC44-15). Now click
the start button on the compiler window. After this compiles with
no errors we will check this design with a simulation.
-
To simulate and check the operations first get a waveform window: choose
open from the File menu, select Waveform Editor file
and .scf extension, select lab3sam.scf and OK. Click
the small magnifying glass (from the menu on the left side of the Altera
window) a few times to zoom out to the full picture. Some input waveforms
are already drawn. To observe the output choose Simulator from the
MAX+plusII menu, and start it. Verify that the output is what you expect.
Now repeat these steps to program your adder circuit . The details
are described below. First, close all the windows in Altera, but leave the
Altera program running.
-
From the File menu choose project and choose name. Enter
a name such as lab3a. This name will be given to the many files
created by the program, and should also be the name of your
SUBDESIGN.
-
From the File menu choose new, select Text Editor file
and OK to open a text editor window. Choose File, Save As,
and save with the same name as the project name (with a .tdf extension
in your U:\EE231\lab3 subdirectory). Enter your program. Choose
File, Project, Save and Check. After it saves with no
errors, assign the proper device. Select start in the Compiler
window. After the program compiles with no errors verify your design with
a simulation.
-
To simulate and verify the program, first get a waveform window. Choose
new from the File menu, select Waveform Editor file
and .scf extension and OK. Choose File, Save As,
and save with the same name as the project name (with a .scf extension).
Choose Enter Node Names from SNF ( Node menu). In the dialog
box turn off the All option under type and turn on
Input and Output. Choose List. Select the variables
you want on the simulation and move them to the Select box with
(=>) button. Choose OK. Choose End Time from the
File menu, and increase the End Time to 16 us. You now should
have a diagram with input and outputs versus time, with time extending out
to 16 us. The inputs are all 0, and the outputs are not determined. Click
the small magnifying glass several times to zoom out to the full picture.
-
There are two ways to enter simulation waveforms. You can draw the input
waveform with the mouse, or you can use the Edit menu. To make
B1 high for the second half of the time, set the cursor on
B1 near the center (at 8 us), press and hold the left mouse button,
drag the cursor to the end, and release. Now click on the 1 menu option
of the left-hand menu. A quick way to get the alternating highs and lows
on A0 is as follows. First, click on the Option menu. If
there is a check mark by the Snap to Grid option, click on it to remove
the check mark. Next, click and highlight A0 near the left edge,
then from the Edit menu, choose Overwrite and Count Value.
(You can also reach this menu by clicking on the C in the left-hand
menu.) Change the Count Every option to 1 us and click on
OK. Repeat for A1, changing the Count Every to 2
us (or changing the Increment By to 2). After creating
a simulation waveform which tests all possible values of the inputs, save
this file. Choose Simulator from the MAX+plusII menu, and start it.
Verify that the output is what you expected. Print out your simulator output.
-
Program the chip. Go over to the programming station in the southeast corner
of the lab, and follow the instructions there to program your chip.
-
Wire your chip. Use the text editor to look at the report file (e.g.,
lab3a.rpt) to see the pin connections to use. Do not print out
the report file -- it is very long. You may highlight the chip outline
showing the pinouts, and print that out (File, Print, Selected
Area). Connect all pins as shown. Note that the adapter connects Pins
10, 22, 30 and 42 to the ground bus, and connects pins 3, 15, 23 and 35 to
the VCC bus, so you do not have to wire these pins
individually. Any other pins labelled GND or VCC
must be wired to the appropriate supply voltage. Use the logic analyzer
and stimulus generator to verify that your logic array is working. You can
have the stimulus generator generate the same waveforms you use in your Altera
simulation.
You will use as stimulus generator the same counter you used before (in Lab
2). Choose the appropriate outputs, Qi 's from the counter, to
use as the four binary inputs ( B10A10 ) to the altera
chip. To have all possible input combinations make the following connections:
Q1 to A0, Q2 to A1, Q3 to B0, Q4 to
B1, and Q5 to the Reset input. Don't forget to connect the Clock
input. The sequence needed (0000, 0001, ... , 1111) can be seen by using
a low frequency clock signal from the protoboard clock and the LEDs of the
protoboard.
To start your stimulus running, connect the stimulus to the inputs of your
Altera chip. Connect the logic analyzer to the inputs and outputs of your
Altera chip. Use the logic analyzer to look at your inputs and outputs and
print the waveforms. The logic analyzer file should look very much like the
stimulus file you generated in Altera.
September 2000
Copyright © 2000, New Mexico Tech