EE/CS 231 Labs

Tentative Lab Schedule for Spring 2001

Number 

Title  Dates 
Lab 1  Introduction to the HCMOS Logic Family  Jan 19, 23
Lab 2  Basic Combinational Circuits using SSI Integrated Circuits  Jan 26, 30
Lab 3  Basic Combinational Circuits using a Programmable Logic Device Feb 2, 6
Lab 4  Design of a 4-Bit Adder using 1-Bit Full Adder Blocks  Feb 9, 13
Lab 5  Using Altera to Implement an Arithmetic Logic Unit  Feb 16,20
Lab 6  Microprocessor Address Decoding using Multiplexors  Feb 23, 27
Lab 7  Debouncing Switches with an RS Latch  Mar 2, 6
Lab 8  Introduction to Clocked Sequential Circuits  Mar 9, 20
Lab 9  T-Bird Taillights Implemented as a Synchronous Counter  Mar 23, 27
Lab 10  Simple State Machines  Mar 30, Apr 3
Lab 11  Protoboard Ping-Pong  Apr 6, 10
Lab 12 Quadrature Decoder Motor Position Determination (A Formal lab report
is required and you can work in goups of two!!)
Apr 17, 20
Lab13 Motor  Speed Determination (work in the same group as in lab 12) Apr 24, 27
Make up week Make up week (A opportunity to redo and resubmit ONE of the 13 labs) Apr 30, May 1,2,3,4

Your Lab. Instructors/TA are:
 

Section 1: (Fri)

Section 2: (Tue)

Instructor: Dr. Wedeward, Dr. Bond Dr. Teare
TA's

Please consult the Grading and Lab Policies guidelines document.