EE 231
Prelab 3: Basic Combinational Circuits using a Programmable Logic Device

Part 1.

1. Fill out the Truth Table of Figure 1 in Lab 3.
2. To get familiar with the Altera software, type in the sample exercise for the majority circuit described in Figure 3 of Lab 3 and compile and simulate your program (consult lab for instructions). Print the Altera generated simulation waveforms including all three inputs and the output.

Part 2.

Write the Altera program for the adder of two two-bit binary numbers. Use the Text Editor to enter your program, save it and check it for errors.

Part 3.

Sketch a circuit to implement the S₂, S₁ and S₀ functions using 74HC00, 74HC04, and 74HC10 chips. How many chips do you need (fewer is better)?

Assume that all chips consume about the same amount of power. How do the the power savings compare when using a programmable chip as opposed to discrete components?

Assume that the circuit failure rate is proportional to the number of external connections. How does the reliability of the programmable chip circuit compare to the reliability of the discrete component circuits?

A 7032 PLD chip is approx. $5 and HC chip ~$0.50. How do the initial circuit costs compare?

Did you include wiring costs?

Bonus question (+5%):

How does their life cycle cost compare?