EE 231
Prelab 4: Design of a 4-Bit Adder using 1-Bit Full Adder Blocks

Part 1.
Read the main lab first and try to understand what you will be required to do in lab. Design a 1-bit full adder in Altera using one of methods described in Lab 4 and compile it.

1. Which method did you use, and why?
   
   
   
   
2. How many combinations of input signals would you use to exhaustively simulate it?
   
   
   
   
3. How many possible input combinations would you need to simulate the 4-bit adder?
   
   
   
   
   

Part 2.
Test your circuit by generating the signals a, b and cin using a fulladder.scf file as described in your previous lab. Rember to print your simulation waveform.