Homework Assignment 5
Due Oct. 1, 2008

1. Problem 4.3
2. Problem 4.6. For Part (b), you do not have to simulate the design.
3. Problem 4.10
4. Problem 4.11
5. Problem 4.12
6. Problem 4.13
7. Problem 4.14
8. Problem 4.40
9. Problem 4.52. You do not need to simulate the design.
10. For the circuit shown in Figure 4.13 of the text, verify that the V output bit is correct for the addition operation. That is, show that (a) V will be 1 when you add two positive numbers together (B3 = 0 and A3 = 0) and get a negative number (S3 = 1), (b) V will be 1 when you add two negative numbers together (B3 = 1 and A3 = 1) and you get a positive number (S3 = 0), and (c) the V output will be 0 in all other circumstances (adding two positives and getting a positive, adding two negatives and getting a negative, or adding a positive and a negative number).