EE 308
Review for Final Exam
Numbers
Decimal to Hex (signed and unsigned)
Hex to Decimal (signed and unsigned)
Binary to Hex
Hex to Binary
Addition and subtraction of fixed-length hex numbers
Overflow, Carry, Zero, Negative bits of CCR
Programming Model
Internal registers - A, B, (D = AB), X, Y, SP, PC, CCR
Addressing Modes and Effective Addresses
INH, IMM, DIR, EXT, REL, IDX (Not Indexed Indirect)
How to determine effective address
Instructions
What they do - Purple book
What machine code is generated
How many cycles to execute
Effect on CCR
Branch instructions - which to use with signed and which with unsigned
Machine Code
Reverse Assembly
Stack and Stack Pointer
What happens to stack and SP for instructions (e.g., PSHX, JSR)
Assembly Language
Be able to read simple assembly language program
Know basic psuedo-ops - e.g., equ, dc.b, ds.w
Flow charts
C Programming
Accessing memory locations
Setting and clearing bits
Clearing flags
Interrupts
Interrupt vectors
How to set interrupt vector in C
What happens to stack, stack pointer and program counter when an interrupt occurs
Enabling interrupts
What to do in interrupt service routines
Take care of things to do when interrupt occurs
Clear source of interrupt
Exit with RTI instead of RTS
HC12 Timer Subsystem
Timer Prescaler and Enable
Timer Overflow Interrupt
Real Time Interrupt
Input Capture
Output Compare
How to enable specific interrupt in timer subsystem
How to clear timer interrupt flags
Pulse Width Modulation
8-bit, left-aligned, high polarity
How to set clock source and period registers to get desired PWM frequency
How to set and change duty cycle
Interfacing
Getting into expanded mode - MODE Register
Ports A and B in expanded mode
Port A - AD 15-8 (Port A is for data for even addresses)
Port B - AD 7-0 (Port B is for data for odd addresses)
E clock
Address on AD 15-0 when E low, Data on AD 15-0 when E high
Need to latch address on rising edge of E clock
E-clock strech - MISC register
R/W Line
LSTRB line
Single-byte and two-byte accesses
16-bit access of even address - A0 low, LSTRB low - accesses even and odd bytes
8-bit access of even address - A0 low, LSTRB high - accesses even byte only
8-bit access of odd address - A0 high, LSTRB low - accesses odd byte only
Timing - Be sure to meet setup and hold times of device receiving data
For a write, meet setup and hold of external device
For a read, meet setup and hold of HC12
SPI
Pins used - SCLK, MOSI, MISO, SS
Make output pins output with DDRS
SP0CR1
Enable SPI
Master or Slave
Enable interrupts
Clock polarity
Clock phase
Automatically operate SS for single-byte transfers
LSB or MSB first
SP0CR2 - always 0 (normal mode)
SP0BR - Set speed (master only)
SP0SR - SPIF flag - clear by reading SP0SR, the access (read or write) SP0DR
SP0DR - shift register - master starts transfer by writing data to SP0DR
A/D Converter
How to power-up A/D converter (ATDCTL2)
Write 0x01 to ATDCTL4 to set at fastest conversion speed
How to set modes of A/D converter (ATDCTL5)
8-channel scan vs. 4-channel scan
Continuous Channel Scan
Multichannel vs. single channel coversions
How to tell when conversion is complete - ATDSTAT register
How to read results of A/D conversions - ADR[0-7]H (8-bit conversions)
Be able to convert from digital number to voltage, and from voltage to digital number (need to know
V
RH
and
V
RL
).
Bill Rison
2000-05-05