EE 308
Homework #8
Due Mar. 21, 2001
- The table below shows some values in the HC12's PWM registers:
HC12.
PWCLK |
PWPOL |
PWEN |
PWSCAL0 |
PWSCAL1 |
PWPER0 |
PWPER1 |
PWDTY0 |
PWDTY1 |
PWCTL |
2D |
5F |
03 |
35 |
57 |
C7 |
63 |
31 |
4F |
00 |
- What is the period of the pulse width modulated signal generated on PWM
channel 0?
- What is the duty cycle of the pulse width modulated signal on PWM
channel 0?
- What is the period of the pulse width modulated signal generated on PWM
channel 1?
- What is the duty cycle of the pulse width modulated signal on PWM
channel 1?
- You want to set up PWM channel 3 to generate a pulse width modulated
signal with a frequency of 1 kHz and a duty cycle of 40%. How will you
set up the HC12 PWM registers to do this? Indicate which clock mode you will
use, and the values of N (and M, if you use clock mode 1).
- Write some C code to set up PWM channel 3 to generate a pulse
width modulated signal with a frequency of 1 kHz and a duty cycle
of 40%. Be sure your code does not change the function of any other
PWM channel?
- Write the program for Part 6 of Lab 8. Note that this includes the code
for the previous parts of the lab.
Bill Rison,
<rison@ee.nmt.edu >