EE 308

Review for Exam 3

• Interfacing
  • Getting into expanded mode - MODE Register
  • Ports A and B in expanded mode
    • Port A - AD 15-8 (Port A is for data for even addresses)
    • Port B - AD 7-0 (Port B is for data for odd addresses)
  • E clock
    • Address on AD 15-0 when E low, Data on AD 15-0 when E high
    • Need to latch address on rising edge of E clock
    • E-clock strech - MISC register
  • R/W Line
  • LSTRB line
  • Single-byte and two-byte accesses
    • 16-bit access of even address - A0 low, LSTRB low - accesses even and odd bytes
    • 8-bit access of even address - A0 low, LSTRB high - accesses even byte only
    • 8-bit access of odd address - A0 high, LSTRB low - accesses odd byte only
  • Timing - Be sure to meet setup and hold times of device receiving data
    • For a write, meet setup and hold of external device
    • For a read, meet setup and hold of HC12

• A/D Converter
  • How to power-up A/D converter (ATDCTL2)
  • How to set modes of A/D converter (ATDCTL5)
  • Write 0x01 to ATDCTL4 to set at fastest conversion speed and 8-bit conversions
  • Write 0x81 to ATDCTL4 to set at fastest conversion speed and 10-bit conversions
    • 8-channel scan vs. 4-channel scan
    • Continuous Channel Scan
    • Multichannel vs. single channel coversions
  • How to tell when conversion is complete - ATDSTAT register
  • How to read results of A/D conversions - ADR[0-7]H (8-bit conversions in bits 7-0)
  • How to read results of A/D conversions - ADR[0-7] (10-bit conversions in bits 15-6)
  • Be able to convert from digital number to voltage, and from voltage to digital number (need to know V_RH and V_RL).

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Bill Rison
2001-04-18