EE 308
Homework #9
Due March 24, 1997

  1. On the figure below, for what address range will Y0 be selected? Will it be an input or an output, or an input-output port?

  2. For the above figure, what are
    1. The data setup time for the 74HC374 output port? (I.e., the time from data valid on the data lines to CS6 going high.) Does this meet the specification from the HC11 Technical Data Manual?
    2. The data hold time for the 74HC374 output port? (I.e., the time from CS6 going high to data being removed from the data lines.) Does this meet the specification from the HC11 Technical Data Manual?
    3. The data setup time for the 74HC373 input port? (I.e., the time from data valid on the data lines to E going low.) Does this meet the specification from the HC11 Technical Data Manual?
    4. The data hold time for the 74HC373 input port? (I.e., the time from E going low to data being removed from the data lines.) Does this meet the specification from the HC11 Technical Data Manual?
  3. Use a 74HC138 and possibly some 4-input NAND gates and some inverters to create a chip select for an output port which will be selected for the address range 0xA200 - 0xA2FF.
  4. The following questions concern timing on the 68HC11 bus. Refer to the Expansion Bus Timing section of the M68HC11 E Series Technical Data Manual and the Bus Timing section of the MC6821 Data Sheet.
    1. What are the Data Delay Time, Read times for the 6821, 68A21, and 68B21. Compare these times to the appropriate time for the 68HC11 bus. Which of the three chips are compatible with the 68HC11 based on this specification?
    2. What are the Data Hold Time, Read times for the 6821, 68A21, and 68B21. Compare these times to the appropriate time for the 68HC11 bus. Which of the three chips are compatible with the 68HC11 based on this specification?
    3. What are the Data Setup Time, Write times for the 6821, 68A21, and 68B21. Compare these times to the appropriate time for the 68HC11 bus. Which of the three chips are compatible with the 68HC11 based on this specification?
    4. What are the Data Hold Time, Write times for the 6821, 68A21, and 68B21. Compare these times to the appropriate time for the 68HC11 bus. Which of the three chips are compatible with the 68HC11 based on this specification?


Bill Rison, <rison@ee.nmt.edu >