EE 308 -- LAB 11
Synchronous Serial Communications on the 68HC11

In this lab, one HC11 board (the master) will be used to send instructions to another HC11 board (the slave). The master HC11 will send a byte to the slave HC11. The slave HC11 will display a pattern of LEDs depending on the value it receives. The system should use the SPI to communicate between the two boards.

The lower two bits of the input word will tell which pattern to implement, and the next two bits will tell the rate at which the display should update:

1. Connect two HC11 EVBU boards together as shown below. The switch going to the CA1 line on the Master HC11 should be one of the debounced switches on your protoboard.

     
   Figure 1: Connection of two HC11 EVBU boards for serial communication.
   

2. Program the master HC11 board as follows:
   • When the switch is pressed, the falling edge should generate a IRQ interrupt. In the interrupt service routine, the master will read the dip switches connected to its PIA Port A0-A3, send that number to the slave over the SPI. It will then return from the interrupt service routine.
   • The MC68HC68T1 Real Time Clock should be programmed to generate an interrupt every second.
   • In the XIRQ interrupt service routine, the master should read the current second from its Real Time Clock and display that value on its set of LEDs.

     Program

3. Program the slave HC11 board as follows:
   • An interrupt will be generated when the slave receives data on its PIA Port A. In the interrupt service routine, the slave should read the value from PIA Port A, change a global variable which will control the display mode, and change the RTI interrupt rate.
   • The slave should use the RTI interrupt to update its display based on the instructions received from the master.
   • Initially, the slave should run in the increment mode, with a 33 ms update rate.

4. Connect your logic analyzer to the master's CA1, MOSI, MISO, SCLK, IRQ, tt PIA Port A Bits 3--0, tt PIA Port A Bit 4, and E Clock lines. Trigger your logic analyzer of the falling edge of the master's CA1 line. Measure the following times, and compare (where appropriate) to the values specified on the MC6821 data sheet:
   1. The time from the falling edge on CA1 to data being sent over the SPI. This is how long it takes the master to get into the CA1 interrupt service routine, read Port A, and send the data.

   2. The SPI clock frequency.

   3. Determine on which SCLK edge the data is valid, and whether the data is sent with the most significant bit or least significant bit first.