| Interrupt | Use | Setup | Enable | Flag | Clear Flag | Vector (BUFFALO) |
| The following interrupts do not rely on the X or I bits of the CCR | ||||||
| ILLOP | Illegal Op Code | ILLOP_VEC | ||||
| COP | COP Failure | CONFIG[2] | Write 0x55 then 0xAA | COP_VEC | ||
| to COPRST | CLM_VEC | |||||
| CME | Clock Monitor | OPTION[3] | ||||
| SWI | Software Int | None | Always enabled | SWI_VEC | ||
| The folowing interrupt is not active unless the X bit of the CCR is clear | ||||||
| XIRQ | External Pin | None | Clear X bit in CCR | XIRQ_VEC | ||
| The following interrupts are not active unless the I bit of the CCR is clear | ||||||
| IRQ | External Pin | Option[5] | Clear I bit in CCR | IRQ_VEC | ||
| PIO | Parallel I/O | PIOC | PIOC[6] | PIOC[7] | Read PIOC | IRQ_VEC |
| on Ports B/C | R/W PORTCL | |||||
| RTI | Periodic Int | PACTL[1:0] | TMSK2[6] | TFLG2[6] | Write 1 to TFLG2[6] | RTI_VEC |
| TIC[1-4] | Cature time | TCTL2 | TMSK1[3:0] | TFLG1[3:0] | Write 1 to Flag Bit | TIC[1-4]_VEC |
| of external pin | PACTL[2] for IC4 | |||||
| TOC1 | Pulse width | OC1M | TMSK1[7] | TFLG1[7] | Write 1 to TFLG1[7] | TOC1_VEC |
| modulation of OC[2-5] | OC1D | |||||
| TOC[2-5] | Control output of | TCTL1 | TMSK1[6:3] | TFLG1[6:3] | Write 1 to TFLG1[6:3] | TOC[5:2]_VEC |
| external pins | PACTL[2] for OC5 | |||||
| TOF | Periodic Int | TMSK2[1:0] | TMSK2[7] | TFLG2[7] | Write 1 to TFLG2[7] | TOF_VEC |
| PAO | Count 256 events on | PACTL[6:4] | TMSK2[5] | TFLG2[5] | Write 1 to TFLG2[5] | PAO_VEC |
| external pin (PA7) | ||||||
| PA | Count event on | PACTL[6:4] | TMSK2[4] | TFLG2[4] | Write 1 to TFLG2[4] | PAIE_VEC |
| external pin (PA7) | ||||||
| SPI | Synchronous Serial | DDRD[5:2] | SPCR[7] | SPSR[7] | Read SPSR | SPI_VEC |
| SPCR | R/W SPDR | |||||
| SCI | Asynchronous Serial | DDRC[1:0] | ||||
| SCCR1 | ||||||
| BAUD | ||||||
| TDRE | Okay to send | SCCR2[7] | SCSR[7] | Read SCSR | SCI_VEC | |
| new data | Write SCDR | |||||
| TC | Transmit Complete | SCCR2[6] | SCSR[6] | Read SCSR | SCI_VEC | |
| Write SCDR | ||||||
| RDRF | New Data Received | SCCR2[5] | SCSR[5] | Read SCSR | SCI_VEC | |
| Read SCDR | ||||||
| IDLE | Idle-Line Detect | SCCR2[4] | SCSR[4] | Read SCSR | SCI_VEC | |
| Read SCDR | ||||||
| OR | Overrun Error | SCCR2[3] | SCSR[3] | Read SCSR | SCI_VEC | |
| Read SCDR | ||||||
| NF | Noise Flag | SCCR2[2] | SCSR[2] | Read SCSR | SCI_VEC | |
| Read SCDR | ||||||
| FE | Framing Error | SCCR2[1] | SCSR[1] | Read SCSR | SCI_VEC | |
| Read SCDR |