HC12 Interrupts

USING INTERRUPTS ON THE HC12

What happens when the HC12 receives an unmasked interrupt?

1.: Finish current instruction
2.: Push all registers onto the stack
3.: Clear I bit of CCR
4.: Load Program Counter from interrupt vector for particular interrupt

Most interrupts have both a specific mask and a general mask. For most interrupts the general mask is the I bit of the CCR. For the TOF interrupt the specific mask is the TOI bit of the TMSK2 register.

Before using interrupts, make sure to:

1.

Load stack pointer

Done for you in C by crts.s

2.

Write Interrupt Service Routine

Do whatever needs to be done to service interrupt
Clear interrupt flag
Exit with RTI
- Use the @interrupt function of the Cosmic C compiler

3.

Load address of interrupt service routine into interrupt vector

4.

Do any setup needed for interrupt

For example, for the TOF interrupt, turn on timer and set prescaler

5.

Enable specific interrupt

6.

Enable interrupts in general (clear I bit of CCR with cli instruction or enable() function

Can disable all (maskable) interrupts with the sei instruction or disable() function.

Interrupt Specific General Normal D-Bug 12

Mask Mask Vector Vector

BDLC BCR1 (IE) I FFD0, FFD1 0B10, 0B11

ATD ATDCTL2 (ASCIE) I FFD2, FFD3 0B12, 0B13

Reserved I FFD4, FFD5 0B14, 0B15

SCI SC0CR2 I FFD6, FFD7 0B16, 0B17

(TIE, TCIE, RIE, ILIE)

SPI SP0CR1 (SPIE) I FFD8, FFD9 0B18, 0B19

Pulse Acc Edge PACTL (PAI) I FFDA, FFDB 0B1A, 0B1B

Pulse Acc Overflow PACTL (PAOVI) I FFDC, FFDD 0B1C, 0B1D

Timer Overflow TMSK2 (TOI) I FFDE, FFDF 0B1E, 0B1F

Timer Channel 7 TMSK1 (C7I) I FFE0, FFE1 0B20, 0B21

Timer Channel 6 TMSK1 (C6I) I FFE2, FFE3 0B22, 0B23

Timer Channel 5 TMSK1 (C5I) I FFE4, FFE5 0B24, 0B25

Timer Channel 4 TMSK1 (C4I) I FFE6, FFE7 0B26, 0B27

Timer Channel 3 TMSK1 (C3I) I FFE8, FFE9 0B28, 0B29

Timer Channel 2 TMSK1 (C2I) I FFEA, FFEB 0B2A, 0B2B

Timer Channel 1 TMSK1 (C1I) I FFEC, FFED 0B2C, 0B2D

Timer Channel 0 TMSK1 (C0I) I FFEE, FFEF 0B2E, 0B2F

Real Time RTICTL (RTIE) I FFF0, FFF1 0B30, 0B31

IRQ INTCR (IRQEN) I FFF2, FFF3 0B32, 0B33

XIRQ (None) X FFFF, FFFF 0B3F, 0B3F

SWI (None) (None) FFF6, FFF7 0B36, 0B37

Unimplemented Instruction (None) (None) FFF8, FFF9 0B38, 0B39

COP failure COP rate select (None) FFFA, FFFB 0B3A, 0B3B

COP clock moniotr fail COPCTL (CME, FCME) (None) FFFC, FFFD 0B3C, 0B3D

Reset (None) (None) FFFE, FFFF 0B3E, 0B3F

Interrupt	Specific	General	Normal	D-Bug 12
	Mask	Mask	Vector	Vector
BDLC	BCR1 (IE)	I	FFD0, FFD1	0B10, 0B11
ATD	ATDCTL2 (ASCIE)	I	FFD2, FFD3	0B12, 0B13
Reserved		I	FFD4, FFD5	0B14, 0B15
SCI	SC0CR2	I	FFD6, FFD7	0B16, 0B17
	(TIE, TCIE, RIE, ILIE)
SPI	SP0CR1 (SPIE)	I	FFD8, FFD9	0B18, 0B19
Pulse Acc Edge	PACTL (PAI)	I	FFDA, FFDB	0B1A, 0B1B
Pulse Acc Overflow	PACTL (PAOVI)	I	FFDC, FFDD	0B1C, 0B1D
Timer Overflow	TMSK2 (TOI)	I	FFDE, FFDF	0B1E, 0B1F
Timer Channel 7	TMSK1 (C7I)	I	FFE0, FFE1	0B20, 0B21
Timer Channel 6	TMSK1 (C6I)	I	FFE2, FFE3	0B22, 0B23
Timer Channel 5	TMSK1 (C5I)	I	FFE4, FFE5	0B24, 0B25
Timer Channel 4	TMSK1 (C4I)	I	FFE6, FFE7	0B26, 0B27
Timer Channel 3	TMSK1 (C3I)	I	FFE8, FFE9	0B28, 0B29
Timer Channel 2	TMSK1 (C2I)	I	FFEA, FFEB	0B2A, 0B2B
Timer Channel 1	TMSK1 (C1I)	I	FFEC, FFED	0B2C, 0B2D
Timer Channel 0	TMSK1 (C0I)	I	FFEE, FFEF	0B2E, 0B2F
Real Time	RTICTL (RTIE)	I	FFF0, FFF1	0B30, 0B31
IRQ	INTCR (IRQEN)	I	FFF2, FFF3	0B32, 0B33
XIRQ	(None)	X	FFFF, FFFF	0B3F, 0B3F
SWI	(None)	(None)	FFF6, FFF7	0B36, 0B37
Unimplemented Instruction	(None)	(None)	FFF8, FFF9	0B38, 0B39
COP failure	COP rate select	(None)	FFFA, FFFB	0B3A, 0B3B
COP clock moniotr fail	COPCTL (CME, FCME)	(None)	FFFC, FFFD	0B3C, 0B3D
Reset	(None)	(None)	FFFE, FFFF	0B3E, 0B3F