Guidelines for using the HC12 A/D Converter

GUIDELINES FOR USING THE HC12 A/D CONVERTER

1.

Power up A/D Converter (ADPU = 1 in ATDCTL2)

2.

Set ATDCTL4 = 0x01 (Gives 2 MHz AD clock with 8 MHz E-clock, 18 clock cycles per conversion)

3.

Select 8-channel mode (S8CM = 1 in ATDCTL5)

4.

Set CD = 0 in ATDCTL5 (CD = 1 for factory test only)

5.

Select MULT in ATDCTL5:

MULT = 0: Convert one channel eight times
- Choose channel to convert with CC, CB, CA of ATDCTL5.
MULT = 1: Convert eight channels

6.

Select SCAN in ATDCTL5:

SCAN = 0: Convert eight samples, then stop
SCAN = 1: Convert continuously

7.

After writing to ATDCTL5, the A/D converter starts, and the SCF bit is cleared. After eight conversions are complete, the SCF flag in ATDSTAT is set. You can read the results of the conversions in ADR[0-7]H.

8.

If SCAN = 0, you need to write to ATDCTL5 to start a new sequence. If SCAN = 1, the conversions continue automatically, and you can read new values in ADR[0-7]H.

9.

To get interrupt after eight conversions completed, set ASCIE bit of ATDCTL2. After eight conversions, ASCIF bit in ATDCTL2 will be set, and an interrupt will be generated.

10.

With 8 MHz E-clock and ATDCTL4 = 0x01, it takes 9 $\mu$ s to make one conversion, 72 $\mu$ s to make eight conversions.

11.

On HC12 EVBU, AD channels 0 and 1 are used to determine start-up program (D-Bug12, EEPROM or bootloader). Do not use AD channels 0 or 1 unless absolutely necessary (you need 7 or 8 channels). If you do need AD channels 0 and/or 1, power up EVBU, then remove jumpers which select start-up program.

12.

$\begin{displaymath}{\tt ADR} = \frac{V_{in} - V_{RL}}{V_{RH}-V_{RL}} \times 255\end{displaymath}$

Normally, V_RL = 0 V, and V_RH = 5 V, so

$\begin{displaymath}{\tt ADR} = \frac{V_{in}}{\rm 5~V} \times 255\end{displaymath}$

Example: ADR0H = 112 => V_in = 2.20 V

13.

You can get more accuracy by averaging multiple conversions. If you need only one channel, set MULT = 0, then average all eight result registers:

   int avg;

   avg = (ADR0H + ADR1H + ADR2H + ADR3H + ADR4H 
                + ADR5H + ADR6H + ADR7H) >> 3;

1999-03-23