EE 322

Lab 10: PLL tone decoder

In this lab we will experiment with the tone decoder chip LM567. In the block diagram, the phase locked loop includes the upper phase detector and the current controlled oscillator (rather than a voltage controlled oscillator). C2 provides loop filtering. The lower phase detector produces a signal with a DC level that is filtered by C3 and detected by the comparator to produce an output. The output of the comparator is a open collector and needs a pull up resistor.

There are several different data sheets for this chip. The National Semiconductor data sheet is brief and does not have as much information as that from Philips Semiconductor. The Philips data sheet is missing parts of the equations shown below (from the National Semiconductor data sheet). All the other figures are from the Philips Semiconductor data sheet.

1) To test the oscillator build the circuit below. Don't forget power (+5 V) and ground. R_L from pin 8 is also connected to +5 V. Make R1 a resistor and pot in series so that the oscillator center frequency can be varied from 2 to 4 kHz or more. Look at and sketch the output at pins 5 and 8. What is the signal at pin 6 (add to sketch); what does this tell you?

2) Add C2 and C3. Don't add R2 untill step 6. Choose C2 to give a 10% bandwidth. Start with C3 as twice C2 as suggested in the data sheet. Observe and tune the oscillator at pin 5 and tune it to 3.5 kHz.

3) Capacitively couple an input signal to pin 3. Find the range of frequencies that the PLL will lock to why is this different if you are increasing or decreasing the frequency? Does the band width agree. How does the output (pin 8) change as the PLL locks?

4) To find out how quickly the output changes after a good signal is seen on pin 3, make the following measurements. Display pins 3 and 8 on the scope, trigger on the output. Set the frequency generator to gated mode and use the manual button to start the signal (use the burst mode in the HP signal generators). Measure the time from the signal start to the change in the output.

5) Increase C3 to make the turn on time at least 10 ms. The charge and voltage on C3 must change before the output can. Thus a larger capacitor will lengthen the time.

6) Add R2 (start at 50K) and adjust to increase the time to 100 ms. This increases the starting voltage at the comparator making a larger change necessary before the comparator changes. Measure the initial and switching voltages (at pin 1) with and without R2.

This circuit should be a tone detector that is very insensitive to interference.