In this experiment we will build a three-bit majority circuit. This is a circuit whose output is high if the majority of its inputs are high. Therefore, the system should output a high signal if two or more of the three inputs are high.

1. Read the instructions for the lab exercise so you understand the purpuse of this prelab.
2. Construct a truth table for the circuit described above.
3. Use a K-map to reduce the resulting function.
4. Draw a fully-labeled circuit schematic from the reduced equation using only chip types 7408, 7404, and 7432. See lab 8 instructions for pin-out diagrams of these devices.

In this lab you will build the Majority Circuit you created in the prelab. Then, unlike last week's lab where we cycled through the input combintations manually with switches, we will use a ripple counter to do that for us.

A ripple counter is a sequential logic device that counts in binary by sequentially changing it's N-bit outputs to cycle through the rows of an N-bit truth table in order, repeatedly. We will use a 12-bit counter model 74HC4040. Since we only need three bits, we will use the three lowest (least significant) bits of the twelve, because lower subsets of the truth table cycle repeatedly regardless of how many additional higher bits the table has. Each successive output on the counter will alternate at half the frequency of the previous bit, just like you see on a truth table, so in this way it can also be used as a frequency divider (but that's not our purpose today).

Since this ripple counter will cycle through all the truth table values in order, it will provide, in sequence, all of the possible input combinations to our system. So we connect the counter circuit to our majority circuit and it will essentially drive itself. The least significant bit (LSB) on the counter is Q1 and the LSB on our circuit is input C, so they will be connected to each other. Likewise, Q2 will be paired with B, and Q3 will be paired with A. So, we will use the first three outputs of the ripple counter Q3, Q2, and Q1 as the inputs A, B, and C to our three-bit majority circuit.

As a sequential logic component, the 4040 counter requires a TTL clock input to drive and govern the speed of its counting. We will use the TTL feature on the function generator built in to the protoboard. This will be connected to the clock input on the counter. The 4040 also requires connections to Vcc and ground. It has an additional input called Reset which forces all outputs low. This input is an active high port, which means you connect Vcc to engage the reset. Remember that you must connect it to ground to disengage the reset. (As with all logic devices "no connection" is not the same as "zero" or "low.") We will connect the reset to a logic switch so we can reset on command to restart counting at 000.

The resulting output of the system can be observed on a logic probe which will detect the HI/LO state of what it is touching, indicating the state with an LED and audible tone. As the output sequences through its values, the logic probe will play a 'song'. We can speed up or slow down the TTL clock input to control the tempo. We will watch and listen for the output pattern 'song' defined by the timing diagram we generated in the lab introduction lecture.

Finally, we will connect your circuit to a logic analyzer which can plot the inputs and outputs over time, generating a timing diagram that documents its actual behavior.

1. Building the Majority Circuit

   Start your experiment by building the majority circuit you designed in the prelab.

   • Be sure you have the correct truth table before you begin.
   • As you will need to access the inputs easily for various purposes, dedicate a bus on your protoboard to each input A, B, and C.
   • Connect the F output to a place on your board that you can identify and access easily for testing. It might even be a good idea to connect it to one of the logic tester ports on the protoboard, but we will still use a logic probe.

2. Connecting the Ripple Counter
   • Wire up your counter (74HC4040) as described in the pre-lab lecture
     • The Clock input of the counter chip will be driven by the TTL clock on the protoboard. Connect the Clock input on the 4040 to a TTL output port on the protoboard (do not connect to the ports for various shaped waveforms).
     • Select the top range switches to Hz and 10, then you can slide the 0.1-1 slider to adjust the frequency.
     • Just to be safe, be sure to adjust the amplitude slider to 5v or so (this function only applies to the other waveform shapes, but in case you connected to one of those instead of the TTL port you'd blow your circuit if the amplitude here were adjusted over 5v.)
     • Connect the Reset input to a logic switch at the bottom of the board so we can control whether it is connected to Vcc or Ground, thus turning on and off the reset function.
   • Connect the counter to the majority circuit
     • The Q1-Q3 outputs of the counter chip will be hooked up as inputs to the majority circuit, so they will be connected to the buses you created for A, B, and C.
     • Be sure to get the bit order correct, matching LSB to LSB and MSB to MSB.

3. Testing the System
   • Use the logic probe to test your circuit by sampling the F output.
     • If you slow the protoboard clock enough so that you can hear the transitions, you should be able to match the sequence of lights and tones to the timing diagram output "song" you expected.
     • If it works as expected, get confirmation from instructor or TA and move on the the next section.
     • If it does not work as expected, follow prudent troubleshooting technique.
     • If it doesn't work at all, check obvious problems such as whether the protoboard power is turned on, or any other easily identifiable issues.
     • If it works but doesn't output what you expected:
       • Confirm that your truth table from the prelab was correct. If not then you'll have to re-design your majority circuit
       • Check your wiring.
         • A common mistake is to reverse the order of bits when connecting the counter outputs to the majority circuit inputs - be sure you have correctly interpreted which are the most and least significant bits and paired them properly.
         • Make sure all Vcc and GND connections are correct. Remember that the 4040 and your logic chips all need power and ground connections to operate. Be sure you're using the proper voltage source for your Vcc connections.
         • Check the rest of your wiring, being careful to follow your diagram. Rather than look at what's there and checking to see if it's right, instead look at the diagram, know what connection you're looking for, and determine if what you see matches it. Move methodically through your wiring so that you check everything in an orderly fashion. Follow the signal chain from input to output. Use the logic probe as you go, checking to see if values match your expectations.

   • Call one of the lab TA's over to look over your wiring and confirm your working circuit. TA sign here _______

4. Using the Logic Analyzer to Generate a Timing Diagram
   1. Now you need to use a logic analyzer to visually confirm the timing diagram for your circuit. Take your chip out of the socket and bring it to the protoboard connected to the logic analyzer testing station.

   2. It is best to obtain software instructions from the Instructor or TA. Have them help you through this process.
      1. Plug your chip into the socket in the testing station. The testing unit should already be connected to the logic analyzer. If not, follow these instrutions:
         • From the logic analyzer pod, attach line 0 on the pin header to signal A on your circuit. Likewise, attach lines 1 and 2 to signals B and C, respectively. Having the three input stimuli attached to the logic analyzer will enable you to monitor your A, B, and C inputs.
         • Next, attach line 3 from the logic analyzer pod to a pin header that comes into contact with the output ("F") of your circuit.

      2. Note: When working with digital circuits, it is extremely important to establish a common ground between all parts of the circuit and any instruments acting on the circuit. Otherwise, the circuit simply may not work. On the logic analyzer pod, locate a ground lead (the black wires with green heat shrink) and connect this into a GROUND on the rotoboard. This establishes a common ground between your circuit and the logic analyzer.

      3. Login to the PC that your logic analyzer is connected to (log into windows only, you do not need to log into the network). Open the logic analyzer software called LA Viewer. There should be an icon on the desktop, or you can find it in the start menu.

      4. To be sure you haven't damaged your wiring while moving and attaching it to the logic analyzer, use the logic probe again to confirm that your output F is still working.
         • In LA Viewer you will see 16 channels on the left (0-15) where each one corresponds to a colored wire coming out of the logic analyzer. In our case, we are only using 4 channels (Ch-0...Ch-03) for A, B, C, and F. We should get rid of all remaining channels by holding control to select multiple channels with the mouse, highlight all channels except the ones we are using. Press delete or right-click on the selected and choose 'delete label'.
         • To the upper right of the program you will see a clcok speed in Hertz, this is how fast the program is going to sample the input, so you want this speed to be much faster than the protoboard clock. A good speed for each is 10kHz for the function generator and 5MHz for LA viewer.
         • When the clock speeds are set at the desired values, acquire the signal by clicking the "man running" icon. Your data should appear on the screen. Depending on your clock speeds, you may need to zoom in or zoom out (using the magnifying glass) to clearly see about two cycles through the truth table combinations on A, B and C. An easy way to check your values is to slide the blue marker at the top of the window over a transition period of the timing diagram and check to make sure that the blue numbers on the left match your truth table.

      5. When you are finished with the logic analyzer timing diagram, print a copy for your lab book. The simplest way to do this is to print an application screen shot.
         • Unmaximize the application window.
         • Using the corner drag tool, resize the application window such that it shows only the portion of the window we need (including your signal lines with minimal blank space below).
         • Hold 'Alt' and press 'Print Screen'. This places a screenshot of the application window on the clipboard.
         • Use Open Office to open a text document and paste the image into the document (ctrl-v works to paste).
         • Print the document.

   3. Paste the waveform printout into your lab book and describe the results.