EE 101

 Lab Exercise 9: Printed Circuit Board Artwork Generation

In Phase I of the class project (lab 6), you designed and simulated a circuit that would alternately flash two LED's while outputting a TTL compatible waveform adjustable from about 1Hz to 10Hz. In Phase II (lab 7) you prototyped your design on a breadboard and enhanced it to provide outputs over several other frequency ranges. In Phase III, you will scale back your design to theoriginal specifications from lab 6 and generate artwork which will create a printed circuit board (PCB). Your design should be similar to theone in Figure 1.

There are some extremely important things to keep in mind for this lab:

Figure 1

Converting your schematic to a PC Board

Figure 2

Rats Nest Layout

Figure 2 shows a jumbled mess of your components and their footprints (package types). The light blue lines connecting all of these are called the "rats nest." You will be responsible for placing these footprints in such a way that they can be connected together easily.

First you will draw a component "keep in" border. The Board Signal Keepin is a rectangle, shown in Figure 3, which will define the size of your printed circuit board.

Figure 3

Next you will move each component to a proper position within the keepinlayer.

Figure 4

Editing the Solder Layer

Next we will begin editing the image that will create your actual PC board. What you see on screen is a combination of several layers. We are trying to design the copper layer for soldering on your board, so the changes we make should be on the Solder Layer. Other layers display helpful information such as labels and component footprints, but when we print the layout onto a copper board, we only want to use the solder layer.

The first editing you need to do is to enlarge the solder pads. These are where we will drill holes and solder the wire leads of the components to the PC board. Be very careful not to accidentally delete a pad in this stage. The only way to replace a deleted pad is to start over with a new rats nest!

Now, by following the connections shown in the rat's nest, you will draw the actual connections, or traces, of your design. These are the flat copper 'wires' on your pc board that will connect your components together.

Figure 5

We will add some labels to your drawing by using the Draw-Text menu option.

Now you need to add copnnection points on your board to attach your VCC (+5V)and Ground inputs.

Figure 6

In order to have your artwork print out properly, your entire design needsto be moved to a specific area on the desktop.

Printing Instructions

Read carefully, If you don't follow these instructions you will end up printing out mountains of useless wasted paper!

  1. DO NOT simply click the Print button on the toolbar
  2. Select Print from the File menu.
  3. Click on Job Setup.
  4. In the field where all the page numbers are listed, delete all page numbers except number 1. If you do not do this, many wasted pages will print out when we execute the print command.
  5. Click on the 1 (page 1) to highlight it. Several board layers will be listed in the field to the side.
  6. Select Solder Layer and Board Sig Keepin layers only. This will print your artwork exactly as it will transfer onto your PCB.
  7. Click on OK
  8. Check the Black and White box and 1 to 1.
  9. Print the job.

For reference, you should also print the circuit again showing the components this time. Go back to the job setup screen and add these layers to page 1 (in addition to the solder and keepin layers): Boundary Top, Assembly Top, Silk Top, Mask Top, and Component. Now print the job again and put both of these images in your lab book.

The rest of this experiment will be during the etching session that each of you must schedule! Your instructor will have a sign-up sheet for individual etching sessions. Be sure you sign up and show up on time. This project takes a significant amount of your instructor's time, so if you miss it or show up late you may not be able to reschedule. The etching session should take about three hours. Before this session you must familiarize yourself with the process by going through the presentation in Lab 13.


March 2006

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