Preliminary version from 2000
Test of Memory and Port Expansion
Now that you have completed your wiring, you will test your work.
One important consideration in completing Homework 9 is understanding when the HC12 will access even addresses and when it will access odd addresses. The following table (modified from Table 13 of the MC68HC912B32 Technical Summary) may help you.
A0 | Type of Access | |
0 | 0 | 16-bit access of even address Access data at even address 0xXXXX and at odd address 0xXXXX+1 |
0 | 1 | 8-bit access of odd address 0xXXXX |
1 | 0 | 8-bit access of even address 0xXXXX |
1 | 1 | 16-bit access of odd address Not used for external addressing |
Note that if A0 = 0, the HC12 will access the even memory location at 0xXXXX. If = 0, the HC12 will access an odd memory location. When accessing odd addresses, if address 0xXXXX is even, the HC12 accesses odd address 0xXXXX+1 as well as the even address 0xXXXX; if address 0xXXXX is odd, the HC12 accesses only the odd address 0xXXXX.
When programming the Altera chip it is important to make sure the pins assigned by the Altera compiler match your wiring. You need to do this as part of Homework 9.
>asm 0D00 LDS #$0C00 ; Load DBug-12 stack pointer CLR $0016 ; Disable COP LDX #$0A00 ; Clear out DBug12 RAM CLR 1,X+ CPX #$0C00 BNE $0D09 LDAA #$2C ; Enable LSTRB and R/W STAA $000A BSET $000B,#$68 ; Expanded wide mode, turn on internal visibility BCLR $0013,#$08 ; Put in one E-Clock stretch JMP $F717 ; Jump to DBug-12
Move Jumper W3 to Position 1, and Jumper W4 to Position 0, then push the reset button on your HC12. Your HC12 will execute the above code, which will put it into expanded wide mode.